|
Newsletters
|
|
|
|
|
Wireless Developer Network - Daily News
WirelessDevNet DevZones
Today's News |
Yesterday's News |
Submit News |
News-"wireless" Top Stories! |
Around-The-Web
| Wireless DevZones!
ZYRAY WIRELESS PUTS A NEW SPIN ON DUAL MODE 3G HANDSETS
San Diego, CA - February 14, 2003: The rapid development of dual mode GSM/GPRS and WCDMA handsets is a significant step closer following the introduction of Zyray Wireless’ SPINNERchip 1.0 WCDMA baseband processor solution. Sampling began ahead of schedule and a complete dual mode WCDMA & GSM/GPRS solution will be demonstrated at the 3GSM World Congress in Cannes.
Proven to connect to a majority of market-leading GSM/GPRS baseband solutions, Zyray’s SPINNERchip 1.0 single chip WCDMA FDD baseband processor began sampling last month. The solution uses a standard memory interface to connect to existing GSM/GPRS baseband processors.
“As an add-on to an existing GSM/GPRS terminal design, SPINNERchip 1.0 provides handset manufacturers with the lowest-risk, lowest-cost path to dual-mode GSM/GPRS and WCDMA handsets,“ said Werner Sievers, President and CEO of Zyray Wireless. “This solution is key to reducing a customer’s development cycle time, maximizing hardware and software reuse and reducing development costs. Significant BOM (Bill of Materials) savings can also be achieved.”
SPINNERchip 1.0 can provide handset manufacturers with a time advantage of up to 12 months and can reduce the cost of a handset development project by as much as $3 million. By utilizing this dual chip strategy, per handset savings are estimated at between $10 - $20.
SPINNERchip 1.0 is a 3GPP Release 99 March 2002 compliant FDD baseband processor, supporting 384kbps operation in uplink and downlink and integrating all functionality required for WCDMA operation into a single chip. The chip includes support for WCDMA ciphering, a programmable analog I/Q RF interface, and an optional USIM interface.
SPINNERchip 1.0 includes on-chip programmable power management and proprietary interference cancellation algorithms that provide enhanced Bit Error Rate performance at minimum power consumption. Currently available in a 16x16mm 280-pin LFBGA test package, the chip will be supplied in a 180-pin, 10x10mm LFBGA production package. SPINNERchip 1.0 is supplied with a comprehensive customer development package that includes the SPINNER evaluation board.
Zyray will demonstrate SPINNERchip 1.0, Stand F33, Hall 2 at the 3GSM World Congress, February 18th – 21st, Cannes, France.
|
|
|
|
